846 lines
22 KiB
Plaintext
846 lines
22 KiB
Plaintext
menu "Example Configuration"
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choice ESP_HOST_DEV_BOARD
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bool "Configure GPIOs based on an ESP Development Board"
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depends on IDF_TARGET_ESP32C6
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default ESP_HOST_DEV_BOARD_NONE
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help
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"Preconfigures GPIOs to use based on an ESP Development Board"
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config ESP_HOST_DEV_BOARD_NONE
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bool "No specific development board"
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config ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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bool "ESP32-P4-Function-EV-Board"
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endchoice
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choice ESP_HOST_INTERFACE
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bool "Transport layer"
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default ESP_SDIO_HOST_INTERFACE if SOC_SDIO_SLAVE_SUPPORTED
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default ESP_SPI_HOST_INTERFACE
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help
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Bus interface to be used for communication with the host
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config ESP_SPI_HOST_INTERFACE
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bool "SPI Full-duplex"
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help
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Enable/Disable SPI Full-duplex host interface
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config ESP_SDIO_HOST_INTERFACE
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bool "SDIO"
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depends on SOC_SDIO_SLAVE_SUPPORTED
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help
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Enable/Disable SDIO host interface
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# SPI Half Duplex is not supported in ESP32
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config ESP_SPI_HD_HOST_INTERFACE
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bool "SPI Half-duplex"
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depends on !IDF_TARGET_ESP32
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help
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Enable/Disable SPI Half-duplex host interface
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config ESP_UART_HOST_INTERFACE
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bool "UART"
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help
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Enable/Disable UART host interface
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endchoice
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menu "SPI Full-duplex Configuration"
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depends on ESP_SPI_HOST_INTERFACE
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choice ESP_SPI_PRIV_MODE
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bool "Slave SPI mode"
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default ESP_SPI_PRIV_MODE_2 if IDF_TARGET_ESP32
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default ESP_SPI_PRIV_MODE_3
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config ESP_SPI_PRIV_MODE_0
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bool "Slave SPI mode 0"
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config ESP_SPI_PRIV_MODE_1
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bool "Slave SPI mode 1"
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config ESP_SPI_PRIV_MODE_2
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bool "Slave SPI mode 2"
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config ESP_SPI_PRIV_MODE_3
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bool "Slave SPI mode 3"
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endchoice
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config ESP_SPI_MODE
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int
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default 0 if ESP_SPI_PRIV_MODE_0
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default 1 if ESP_SPI_PRIV_MODE_1
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default 2 if ESP_SPI_PRIV_MODE_2
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default 3 if ESP_SPI_PRIV_MODE_3
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default 3
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choice SPI_CONTROLLER
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bool "SPI controller to use"
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default SPI_HSPI
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config SPI_HSPI
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bool "FSPI/HSPI"
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help
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"HSPI/FSPI: SPI_controller_1"
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config SPI_VSPI
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depends on IDF_TARGET_ESP32
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bool "VSPI"
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help
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"VSPI: SPI_controller_2"
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endchoice
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config ESP_SPI_CONTROLLER
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int
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default 2 if SPI_VSPI
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default 1
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menu "Hosted SPI GPIOs"
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config ESP_SPI_HSPI_GPIO_MOSI
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depends on SPI_HSPI
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int "Slave GPIO pin for Host MOSI"
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default 20 if ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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default 13 if IDF_TARGET_ESP32
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default 11 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
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default 7
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help
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SPI controller Host MOSI
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config ESP_SPI_HSPI_GPIO_MISO
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depends on SPI_HSPI
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int "Slave GPIO pin for Host MISO"
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default 21 if ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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default 12 if IDF_TARGET_ESP32
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default 13 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
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default 2
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help
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SPI controller Host MISO
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config ESP_SPI_HSPI_GPIO_CLK
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depends on SPI_HSPI
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int "Slave GPIO pin for Host CLK"
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default 19 if ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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default 3 if IDF_TARGET_ESP32C5
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default 14 if IDF_TARGET_ESP32
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default 12 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
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default 6
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help
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SPI controller Host CLK
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config ESP_SPI_HSPI_GPIO_CS
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depends on SPI_HSPI
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int "Slave GPIO pin for Host CS"
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default 18 if ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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default 15 if IDF_TARGET_ESP32
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default 10 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
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default 10
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help
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SPI controller Host CS
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config ESP_SPI_VSPI_GPIO_MOSI
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depends on SPI_VSPI
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int "Slave GPIO pin for Host MOSI"
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default 23
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help
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SPI controller Host MOSI
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config ESP_SPI_VSPI_GPIO_MISO
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depends on SPI_VSPI
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int "Slave GPIO pin for Host MISO"
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default 19
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help
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SPI controller Host MISO
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config ESP_SPI_VSPI_GPIO_CLK
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depends on SPI_VSPI
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int "Slave GPIO pin for Host CLK"
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default 18
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help
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SPI controller Host CLK
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config ESP_SPI_VSPI_GPIO_CS
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depends on SPI_VSPI
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int "Slave GPIO pin for Host CS"
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default 5
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help
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SPI controller Host CS
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config ESP_SPI_GPIO_MOSI
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int
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default ESP_SPI_VSPI_GPIO_MOSI if SPI_VSPI
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default ESP_SPI_HSPI_GPIO_MOSI
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config ESP_SPI_GPIO_MISO
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int
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default ESP_SPI_VSPI_GPIO_MISO if SPI_VSPI
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default ESP_SPI_HSPI_GPIO_MISO
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config ESP_SPI_GPIO_CLK
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int
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default ESP_SPI_VSPI_GPIO_CLK if SPI_VSPI
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default ESP_SPI_HSPI_GPIO_CLK
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config ESP_SPI_GPIO_CS
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int
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default ESP_SPI_VSPI_GPIO_CS if SPI_VSPI
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default ESP_SPI_HSPI_GPIO_CS
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config ESP_SPI_GPIO_HANDSHAKE
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int "Slave GPIO pin for handshake"
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default 22 if ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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default 4 if IDF_TARGET_ESP32C5
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default 3 if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C6
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default 17 if IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32S2
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default 26
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help
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Slave GPIO pin to use for handshake with other spi controller
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config ESP_SPI_GPIO_DATA_READY
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int "Slave GPIO pin for data ready interrupt"
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default 23 if ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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default 0 if IDF_TARGET_ESP32C5
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default 13 if IDF_TARGET_ESP32C5
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default 4
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help
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Slave GPIO pin for indicating host that SPI slave has data to be read by host
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config ESP_SPI_GPIO_RESET
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int "Slave GPIO pin to reset itself"
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default -1
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help
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Host uses this pin to reset the slave ESP. To re-use ESP 'RST' or 'EN' GPIO, set value to -1
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endmenu
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config ESP_SPI_DEASSERT_HS_ON_CS
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bool "Deassert Handshake when SPI CS is deasserted"
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default y
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help
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Deassert Handshake and prepare a new SPI transaction only after
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CS has been deasserted. This helps prevent data loss with MCUs
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that delay deasserting CS after the end of a SPI transaction
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by prematurely starting a new slave SPI transaction
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since CS is detected by the slave as still asserted.
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config ESP_SPI_TX_Q_SIZE
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int "ESP to Host SPI queue size"
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default 10 if IDF_TARGET_ESP32
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default 6 if IDF_TARGET_ESP32C2 && BT_ENABLED
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default 10 if IDF_TARGET_ESP32C2
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default 20
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help
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Very small tx queue will lower ESP -- SPI --> Host data rate
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config ESP_SPI_RX_Q_SIZE
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int "Host to ESP SPI queue size"
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default 10 if IDF_TARGET_ESP32
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default 6 if IDF_TARGET_ESP32C2 && BT_ENABLED
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default 7 if IDF_TARGET_ESP32C2
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default 20
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help
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Very small RX queue will lower ESP <-- SPI -- Host data rate
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config ESP_SPI_CHECKSUM
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bool "SPI checksum ENABLE/DISABLE"
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default y
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help
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ENABLE/DISABLE software SPI checksum
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endmenu
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menu "SDIO Configuration"
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depends on ESP_SDIO_HOST_INTERFACE
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config ESP_SDIO_STREAMING_MODE
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bool "Enable SDIO Streaming Mode"
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default y
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help
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Enable Streaming Mode. Host to receive queued data from slave
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as one stream instead of individual packets. This can improve
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host SDIO read performance by doing one large read transaction
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instead of many smaller read transactions.
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config ESP_SDIO_GPIO_RESET
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int "Slave GPIO pin to reset itself"
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default -1
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help
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Host uses this pin to reset the slave ESP. To re-use ESP 'RST' or 'EN' GPIO, set value to -1
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choice
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prompt "SDIO Bus Speed"
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default ESP_SDIO_HIGH_SPEED
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help
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Select the SDIO Slave Bus Speed. Actual speed in use depends on SDIO bus speed the SDIO Master can support
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config ESP_SDIO_DEFAULT_SPEED
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bool "Default Speed (20 MHz)"
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config ESP_SDIO_HIGH_SPEED
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bool "High Speed (40 MHz)"
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endchoice
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# from <esp-idf>/components/soc/<soc>/include/soc/sdio_slave_pins.h
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menu "Hosted SDIO GPIOs"
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config ESP_SDIO_PIN_CMD
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int "CMD GPIO number"
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range 15 15 if IDF_TARGET_ESP32
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range 18 18 if IDF_TARGET_ESP32C6
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range 10 10 if IDF_TARGET_ESP32C5
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help
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"Value cannot be configured. Displayed for reference."
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config ESP_SDIO_PIN_CLK
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int "CLK GPIO number"
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range 14 14 if IDF_TARGET_ESP32
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range 19 19 if IDF_TARGET_ESP32C6
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range 9 9 if IDF_TARGET_ESP32C5
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help
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"Value cannot be configured. Displayed for reference."
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config ESP_SDIO_PIN_D0
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int "D0 GPIO number"
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range 2 2 if IDF_TARGET_ESP32
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range 20 20 if IDF_TARGET_ESP32C6
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range 8 8 if IDF_TARGET_ESP32C5
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help
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"Value cannot be configured. Displayed for reference."
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config ESP_SDIO_PIN_D1
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int "D1 GPIO number"
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range 4 4 if IDF_TARGET_ESP32
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range 21 21 if IDF_TARGET_ESP32C6
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range 7 7 if IDF_TARGET_ESP32C5
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help
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"Value cannot be configured. Displayed for reference."
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config ESP_SDIO_PIN_D2
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int "D2 GPIO number"
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range 12 12 if IDF_TARGET_ESP32
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range 22 22 if IDF_TARGET_ESP32C6
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range 14 14 if IDF_TARGET_ESP32C5
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help
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"Value cannot be configured. Displayed for reference."
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config ESP_SDIO_PIN_D3
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int "D3 GPIO number"
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range 13 13 if IDF_TARGET_ESP32
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range 23 23 if IDF_TARGET_ESP32C6
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range 13 13 if IDF_TARGET_ESP32C5
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help
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"Value cannot be configured. Displayed for reference."
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endmenu
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choice
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prompt "SDIO Slave Timing"
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default ESP_SDIO_PSEND_PSAMPLE
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help
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Select the SDIO timing used by slave. Default value works with most
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SDMMC controllers but if transfer errors are encountered, selecting a
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different timing may help resolve the errors.
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See https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/peripherals/sdio_slave.html#_CPPv419sdio_slave_timing_t
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for more information
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config ESP_SDIO_PSEND_PSAMPLE
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bool "Send at positive edge, sample at positive edge"
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config ESP_SDIO_NSEND_PSAMPLE
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bool "Send at negative edge, sample at positive edge"
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config ESP_SDIO_PSEND_NSAMPLE
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bool "Send at positive edge, sample at negative edge"
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config ESP_SDIO_NSEND_NSAMPLE
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bool "Send at negative edge, sample at negative edge"
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endchoice
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config ESP_SDIO_TX_Q_SIZE
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int "SDIO TX queue size"
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default 20
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help
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Very small TX queue will lower ESP --> SDIO -- Host data rate
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config ESP_SDIO_RX_Q_SIZE
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int "SDIO RX queue size"
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default 20
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help
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Very small RX queue will lower ESP <-- SDIO -- Host data rate
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config ESP_SDIO_CHECKSUM
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bool "SDIO checksum ENABLE/DISABLE"
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default n
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help
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ENABLE/DISABLE software SDIO checksum
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endmenu
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menu "SPI Half-duplex Configuration"
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depends on ESP_SPI_HD_HOST_INTERFACE
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choice ESP_SPI_HD_PRIV_MODE
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bool "Slave SPI mode"
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default ESP_SPI_HD_PRIV_MODE_3
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config ESP_SPI_HD_PRIV_MODE_0
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bool "Slave SPI mode 0"
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config ESP_SPI_HD_PRIV_MODE_1
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bool "Slave SPI mode 1"
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config ESP_SPI_HD_PRIV_MODE_2
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bool "Slave SPI mode 2"
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config ESP_SPI_HD_PRIV_MODE_3
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bool "Slave SPI mode 3"
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endchoice
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config ESP_SPI_HD_MODE
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int
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default 0 if ESP_SPI_HD_PRIV_MODE_0
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default 1 if ESP_SPI_HD_PRIV_MODE_1
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default 2 if ESP_SPI_HD_PRIV_MODE_2
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default 3 if ESP_SPI_HD_PRIV_MODE_3
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help
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SPI Mode to use. The same mode must be used on both host and slave.
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choice ESP_SPI_HD_PRIV_INTERFACE_NUM_DATA_LINES
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bool "Num Data Lines to use"
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default ESP_SPI_HD_PRIV_INTERFACE_4_DATA_LINES
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help
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Number of Data Lines to use in the SPI HD interface
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config ESP_SPI_HD_PRIV_INTERFACE_4_DATA_LINES
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bool "4 data lines"
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config ESP_SPI_HD_PRIV_INTERFACE_2_DATA_LINES
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bool "2 data lines"
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endchoice
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config ESP_SPI_HD_INTERFACE_NUM_DATA_LINES
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int
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default 4 if ESP_SPI_HD_PRIV_INTERFACE_4_DATA_LINES
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default 2 if ESP_SPI_HD_PRIV_INTERFACE_2_DATA_LINES
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menu "GPIOs"
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config ESP_SPI_HD_GPIO_CS
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int "Slave GPIO pin for Host CS"
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default 18 if ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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default 10
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help
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SPI HD controller Host CS
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config ESP_SPI_HD_GPIO_CLK
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int "Slave GPIO pin for Host CLK"
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default 19 if ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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default 3 if IDF_TARGET_ESP32C5
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default 6
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help
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SPI HD controller Host CS
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config ESP_SPI_HD_GPIO_D0
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int "Slave GPIO pin for Host D0"
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default 20 if ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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default 7
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help
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SPI HD controller Host D0
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config ESP_SPI_HD_GPIO_D1
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int "Slave GPIO pin for Host D1"
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default 21 if ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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default 2
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help
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SPI HD controller Host D1
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config ESP_SPI_HD_GPIO_D2
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depends on ESP_SPI_HD_PRIV_INTERFACE_4_DATA_LINES
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int "Slave GPIO pin for Host D2"
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default 22 if ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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default 5
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help
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SPI HD controller Host D2
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config ESP_SPI_HD_GPIO_D3
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depends on ESP_SPI_HD_PRIV_INTERFACE_4_DATA_LINES
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int "Slave GPIO pin for Host D3"
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default 23 if ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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default 4
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help
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SPI HD controller Host D3
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config ESP_SPI_HD_GPIO_DATA_READY
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int "Slave GPIO pin for Data Ready"
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default 2 if ESP_HOST_DEV_BOARD_P4_FUNC_BOARD
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default 0 if IDF_TARGET_ESP32C5
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default 11
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help
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Slave GPIO pin for indicating host that SPI slave has data to be read by host
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choice ESP_SPI_HD_DATAREADY_GPIO_CONFIG
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bool "DataReady GPIO Config"
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default ESP_DR_ACTIVE_HIGH
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help
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Configure Data Ready to be active high (default) or active low
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config ESP_DR_ACTIVE_HIGH
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bool "Active High"
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config ESP_DR_ACTIVE_LOW
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bool "Active Low"
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endchoice
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config ESP_SPI_HD_GPIO_RESET
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int "Slave GPIO pin to reset itself"
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default -1
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help
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Host uses this pin to reset the slave ESP. To re-use ESP 'RST' or 'EN' GPIO, set value to -1
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endmenu
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config ESP_SPI_HD_Q_SIZE
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int "Queue size"
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default 12 if IDF_TARGET_ESP32C2
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default 10 if IDF_TARGET_ESP32C5
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default 20
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help
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Very small queue will lower SPI HD data rate
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config ESP_SPI_HD_CHECKSUM
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bool "Checksum ENABLE/DISABLE"
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default y
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help
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ENABLE/DISABLE SPI HD software checksum
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endmenu
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menu "UART Configuration"
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depends on ESP_UART_HOST_INTERFACE
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config ESP_UART_PORT
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int "UART Port to Use"
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default 1
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range 0 2 if IDF_TARGET_ESP32
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range 0 1 if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C5 || IDF_TARGET_ESP32C6
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range 0 2 if IDF_TARGET_ESP32C61
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range 0 1 if IDF_TARGET_ESP32S2
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range 0 2 if IDF_TARGET_ESP32S3
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help
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Select UART Port to Use. Do not select the UART Port used for console output (if enabled)
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config ESP_UART_PIN_TX
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int "TX GPIO number"
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default 13 if IDF_TARGET_ESP32
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default 5 if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C3
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default 14 if IDF_TARGET_ESP32C5
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default 21 if IDF_TARGET_ESP32C6
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default 5 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
|
|
help
|
|
GPIO used for UART TX
|
|
|
|
config ESP_UART_PIN_RX
|
|
int "RX GPIO number"
|
|
default 12 if IDF_TARGET_ESP32
|
|
default 4 if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C3
|
|
default 13 if IDF_TARGET_ESP32C5
|
|
default 20 if IDF_TARGET_ESP32C6
|
|
default 4 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
|
|
help
|
|
GPIO used for UART RX
|
|
|
|
config ESP_UART_BAUDRATE
|
|
int "Baud Rate"
|
|
default 921600
|
|
range 9600 3500000
|
|
help
|
|
Baud Rate to Use. Make sure Hardware supports the rate. Standard rates are 9600, 19200, 38400, 57600, 115200, 460800, 921600
|
|
|
|
config ESP_UART_NUM_DATA_BITS
|
|
int "Number of Data Bits"
|
|
default 8
|
|
range 5 8
|
|
help
|
|
Number of Data Bits to use
|
|
|
|
choice ESP_UART_PRIV_PARITY
|
|
bool "Parity"
|
|
|
|
config ESP_UART_PRIV_PARITY_NONE
|
|
bool "None"
|
|
|
|
config ESP_UART_PRIV_PARITY_EVEN
|
|
bool "Even"
|
|
|
|
config ESP_UART_PRIV_PARITY_ODD
|
|
bool "Odd"
|
|
endchoice
|
|
|
|
config ESP_UART_PARITY
|
|
int
|
|
default 0 if ESP_UART_PRIV_PARITY_NONE
|
|
default 1 if ESP_UART_PRIV_PARITY_EVEN
|
|
default 2 if ESP_UART_PRIV_PARITY_ODD
|
|
|
|
choice ESP_UART_PRIV_STOP_BITS
|
|
bool "Number of Stop Bits"
|
|
|
|
config ESP_UART_PRIV_STOP_BITS_1
|
|
bool "1"
|
|
|
|
config ESP_UART_PRIV_STOP_BITS_1_5
|
|
bool "1.5"
|
|
|
|
config ESP_UART_PRIV_STOP_BITS_2
|
|
bool "2"
|
|
endchoice
|
|
|
|
config ESP_UART_STOP_BITS
|
|
int
|
|
default 0 if ESP_UART_PRIV_STOP_BITS_1
|
|
default 1 if ESP_UART_PRIV_STOP_BITS_1_5
|
|
default 2 if ESP_UART_PRIV_STOP_BITS_2
|
|
|
|
config ESP_UART_GPIO_RESET
|
|
int "Slave GPIO pin to reset itself"
|
|
default -1
|
|
help
|
|
Host uses this pin to reset the slave ESP. To re-use ESP 'RST' or 'EN' GPIO, set value to -1
|
|
|
|
config ESP_UART_TX_Q_SIZE
|
|
int "Tx Queue Size"
|
|
default 5
|
|
help
|
|
UART rates are low, so large queue sizes are not required
|
|
|
|
config ESP_UART_RX_Q_SIZE
|
|
int "Rx Queue Size"
|
|
default 5
|
|
help
|
|
UART rates are low, so large queue sizes are not required
|
|
|
|
config ESP_UART_CHECKSUM
|
|
bool "UART checksum ENABLE/DISABLE"
|
|
default y
|
|
help
|
|
ENABLE/DISABLE software UART checksum
|
|
endmenu
|
|
|
|
config ESP_GPIO_SLAVE_RESET
|
|
int
|
|
default ESP_SPI_GPIO_RESET if ESP_SPI_HOST_INTERFACE
|
|
default ESP_SDIO_GPIO_RESET if ESP_SDIO_HOST_INTERFACE
|
|
default ESP_SPI_HD_GPIO_RESET if ESP_SPI_HD_HOST_INTERFACE
|
|
default ESP_UART_GPIO_RESET if ESP_UART_HOST_INTERFACE
|
|
|
|
# HCI UART menu for ESP32-C3/S3
|
|
menu "HCI UART Settings"
|
|
depends on BT_CTRL_HCI_MODE_UART_H4 && (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3)
|
|
|
|
# only S3 has two UART ports to select from
|
|
config ESP_HOSTED_PRIV_BT_UART_PORT_ESP32_S3
|
|
int "HCI UART Port"
|
|
depends on IDF_TARGET_ESP32S3
|
|
default 1
|
|
range 1 2
|
|
help
|
|
UART Port for HCI
|
|
|
|
config ESP_HOSTED_BT_UART_PORT_ESP32_C3_S3
|
|
int
|
|
default ESP_HOSTED_PRIV_BT_UART_PORT_ESP32_S3 if IDF_TARGET_ESP32S3
|
|
default 1
|
|
|
|
config ESP_HOSTED_BT_UART_BAUDRATE_ESP32_C3_S3
|
|
int "HCI UART Baudrate"
|
|
range 115200 921600
|
|
default 921600
|
|
help
|
|
UART Baudrate for HCI. Please use standard baudrate.
|
|
|
|
config ESP_HOSTED_BT_UART_TX_PIN_ESP32_C3_S3
|
|
int "HCI UART Tx Pin"
|
|
default 5 if IDF_TARGET_ESP32C3
|
|
default 16
|
|
help
|
|
UART Tx Pin for HCI
|
|
|
|
config ESP_HOSTED_BT_UART_RX_PIN_ESP32_C3_S3
|
|
int "HCI UART Rx Pin"
|
|
default 18
|
|
help
|
|
UART Rx Pin for HCI
|
|
|
|
choice ESP_HOSTED_PRIV_BT_UART_FLOWCONTROL_ESP32_C3_S3
|
|
bool "HCI UART Flow Control"
|
|
default ESP_HOSTED_BT_UART_FLOWCONTROL_DISABLED
|
|
|
|
config ESP_HOSTED_BT_UART_FLOWCONTROL_DISABLED
|
|
bool "Disabled"
|
|
|
|
config ESP_HOSTED_BT_UART_FLOWCONTROL_ENABLED
|
|
bool "Enabled"
|
|
endchoice
|
|
|
|
config ESP_HOSTED_BT_UART_FLOWCONTROL_ESP32_C3_S3
|
|
int
|
|
default 3 if ESP_HOSTED_BT_UART_FLOWCONTROL_ENABLED
|
|
default 0
|
|
|
|
config ESP_HOSTED_BT_UART_RTS_PIN_ESP32_C3_S3
|
|
depends on ESP_HOSTED_BT_UART_FLOWCONTROL_ENABLED
|
|
int "HCI UART RTS Pin"
|
|
default 19
|
|
help
|
|
UART RTS Pin for HCI
|
|
|
|
config ESP_HOSTED_BT_UART_CTS_PIN_ESP32_C3_S3
|
|
depends on ESP_HOSTED_BT_UART_FLOWCONTROL_ENABLED
|
|
int "HCI UART CTS Pin"
|
|
default 1 if IDF_TARGET_ESP32C3
|
|
default 20
|
|
help
|
|
UART CTS Pin for HCI
|
|
|
|
endmenu
|
|
|
|
# HCI UART menu for ESP32
|
|
menu "HCI UART Settings"
|
|
depends on BTDM_CTRL_HCI_MODE_UART_H4 && IDF_TARGET_ESP32
|
|
|
|
config ESP_HOSTED_BT_UART_TX_PIN_ESP32
|
|
int "HCI UART Tx Pin"
|
|
default 5
|
|
help
|
|
UART Tx Pin for HCI
|
|
|
|
config ESP_HOSTED_BT_UART_RX_PIN_ESP32
|
|
int "HCI UART Rx Pin"
|
|
default 18
|
|
help
|
|
UART Rx Pin for HCI
|
|
|
|
config ESP_HOSTED_BT_UART_RTS_PIN_ESP32
|
|
depends on BTDM_CTRL_HCI_UART_FLOW_CTRL_EN
|
|
int "HCI UART RTS Pin"
|
|
default 19
|
|
help
|
|
UART RTS Pin for HCI
|
|
|
|
config ESP_HOSTED_BT_UART_CTS_PIN_ESP32
|
|
depends on BTDM_CTRL_HCI_UART_FLOW_CTRL_EN
|
|
int "HCI UART CTS Pin"
|
|
default 23
|
|
help
|
|
UART CTS Pin for HCI
|
|
|
|
comment "HCI UART Settings from Bluetooth Component"
|
|
comment "To change Port, Baud Rate, Flow Control, select Component config ---> Bluetooth ---> Controller Options ---> HCI Config"
|
|
|
|
config ESP_HOSTED_BT_UART_PORT_ESP32
|
|
int "HCI UART Port"
|
|
range BTDM_CTRL_HCI_UART_NO BTDM_CTRL_HCI_UART_NO
|
|
help
|
|
UART Port for HCI
|
|
|
|
config ESP_HOSTED_BT_UART_BAUDRATE_ESP32
|
|
int "HCI UART Baudrate"
|
|
range BTDM_CTRL_HCI_UART_BAUDRATE BTDM_CTRL_HCI_UART_BAUDRATE
|
|
help
|
|
UART Baudrate for HCI. Please use standard baudrate.
|
|
|
|
endmenu
|
|
|
|
# HCI UART menu for other ESP32 chips
|
|
menu "HCI UART Settings"
|
|
depends on BT_LE_HCI_INTERFACE_USE_UART && !IDF_TARGET_ESP32 && !IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32S3
|
|
comment "HCI UART Settings from Bluetooth Component"
|
|
comment "To change, select Component config ---> Bluetooth ---> Controller Options ---> HCI Config"
|
|
|
|
config ESP_HOSTED_BT_UART_PORT
|
|
int "HCI UART Port"
|
|
range BT_LE_HCI_UART_PORT BT_LE_HCI_UART_PORT # kconfig ignore: multiple-definition
|
|
help
|
|
UART Port for HCI
|
|
|
|
config ESP_HOSTED_BT_UART_TX_PIN
|
|
int "HCI UART Tx Pin"
|
|
range BT_LE_HCI_UART_TX_PIN BT_LE_HCI_UART_TX_PIN
|
|
help
|
|
UART Tx Pin for HCI
|
|
|
|
config ESP_HOSTED_BT_UART_RX_PIN
|
|
int "HCI UART Rx Pin"
|
|
range BT_LE_HCI_UART_RX_PIN BT_LE_HCI_UART_RX_PIN
|
|
help
|
|
UART Rx Pin for HCI
|
|
|
|
config ESP_HOSTED_BT_UART_RTS_PIN
|
|
depends on BT_LE_HCI_UART_FLOWCTRL
|
|
int "HCI UART RTS Pin"
|
|
range BT_LE_HCI_UART_RTS_PIN BT_LE_HCI_UART_RTS_PIN
|
|
help
|
|
UART RTS Pin for HCI
|
|
|
|
config ESP_HOSTED_BT_UART_CTS_PIN
|
|
depends on BT_LE_HCI_UART_FLOWCTRL
|
|
int "HCI UART CTS Pin"
|
|
range BT_LE_HCI_UART_CTS_PIN BT_LE_HCI_UART_CTS_PIN
|
|
help
|
|
UART CTS Pin for HCI
|
|
|
|
config ESP_HOSTED_BT_UART_BAUDRATE
|
|
int "HCI UART Baudrate"
|
|
range BT_LE_HCI_UART_BAUD BT_LE_HCI_UART_BAUD
|
|
help
|
|
UART Baudrate for HCI. Please use standard baudrate.
|
|
|
|
endmenu
|
|
|
|
config ESP_DEFAULT_TASK_STACK_SIZE
|
|
int "ESP-Hosted task stack size"
|
|
default 4096
|
|
help
|
|
Default task size of ESP-Hosted tasks
|
|
|
|
config ESP_DEFAULT_TASK_PRIO
|
|
int "ESP-Hosted task priority"
|
|
default 22
|
|
help
|
|
Default task priority of ESP-Hosted tasks
|
|
|
|
config ESP_CACHE_MALLOC
|
|
bool "Enable Mempool"
|
|
default y
|
|
help
|
|
Mempool will help to alloc buffer without going to heap for every memory allocation or free
|
|
|
|
config ESP_OTA_WORKAROUND
|
|
bool "OTA workaround - Add sleeps while OTA write"
|
|
default y
|
|
help
|
|
Enable/disable sleeps while OTA operations
|
|
|
|
menu "Hosted Debugging"
|
|
config ESP_RAW_THROUGHPUT_TRANSPORT
|
|
bool "RawTP: Transport level throughput debug test"
|
|
default n
|
|
help
|
|
Find max transport performance which helps to assess stability of porting done
|
|
|
|
config ESP_RAW_TP_ESP_TO_HOST_PKT_LEN
|
|
depends on ESP_RAW_THROUGHPUT_TRANSPORT
|
|
int "RawTP: ESP to Host packet size"
|
|
range 1 1500
|
|
default 1460
|
|
|
|
config ESP_RAW_TP_REPORT_INTERVAL
|
|
depends on ESP_RAW_THROUGHPUT_TRANSPORT
|
|
int "RawTP: periodic duration to report stats accumulated"
|
|
default 10
|
|
|
|
config ESP_PKT_STATS
|
|
bool "Transport level packet stats"
|
|
default n
|
|
help
|
|
On comparing with slave packet stats helps to understand any packet loss at hosted
|
|
endmenu
|
|
endmenu
|